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Worldwide 
Europe
V850ES/JG3 Microcontrollers
Features
- Operating Voltage: 2.85 to 3.6 V
- Max. frequency: 32 MHz
- ROM capacities: 384 KB to 1024 KB flash memory
- RAM capacities: 32 KB to 60 KB
- Package: 100-pin plastic LQFP package
- Minimum instruction execution time: 31.25 ns (operating with main clock (fXX) of 32 MHz)
- General-purpose registers: 32 bits x 32 registers
- CPU features:
- Signed multiplication (16 x 16 -> 32): 1 to 2 clocks
- Signed multiplication (32 x 32 -> 64): 1 to 5 clocks
- Saturated operations (overflow and underflow detection functions included)
- 32-bit shift instruction: 1 clock
- Bit manipulation instructions
- Load/store instructions with long/short format - Memory space: 64 MB of linear address space (for programs and data) Interrupts and exceptions:
- I/O ports: 84
- Timer function:
- 16-bit interval timer M (TMM): 1 channel
- 16-bit timer/event counter P (TMP): 6 channels
- 16-bit timer/event counter Q (TMQ): 1 channel
- Watch timer: 1 channel
- Watchdog timer 2: 1 channel - Serial interface:
- Asynchronous serial interface A (UARTA)
- 3-wire variable-length serial interface B (CSIB)
- UARTA/CSIB: 1 channel
- UARTA/I2C: 2 channels
- CSIB/I2C: 1 channel
- CSIB: 3 channels - A/D converter: 10-bit resolution: 12 channels
- D/A converter: 8-bit resolution: 2 channels
- DCU (Debug control unit): JTAG interface
- Clock generator:
- During main clock or subclock operation
- 7-level CPU clock (fXX, fXX/2, fXX/4, fXX/8, fXX/16, fXX/32, fXT)
- Clock-through mode/PLL mode selectable
- Internal oscillation clock: 200 kHz (TYP.) - Power-save functions: HALT/IDLE1/IDLE2/STOP/subclock/sub-IDLE mode
- Non-maskable interrupts: 2 sources
- Maskable interrupts: 55 sources
- Software exceptions: 32 sources
- Exception trap: 2 sources
