NEC Electronics Introduces New Backplane Transceiver Chips

Contributing to Miniaturization and Cost Reduction of Communication Systems

NEC Electronics Corporation and its subsidiary in Europe, NEC Electronics (Europe) GmbH, announced today the availability of samples of a new member of backplane transceiver chip family.  The new product µPD98442, follows the already available µPD98441. These express Transmitter Receiver devices (for short eTR) realize backplane transmission by converting a UTOPIA or POS-PHYTM parallel interface, widely used in chips for communication systems, into a high-speed 880 Mbps LVDS (Low-Voltage Differential Signaling) serial interface.  While the already existing device µPD98441 (eTR2) supports 2 serial communication lines, the new device µPD98442 (eTR8) supports 8 lines.  Serial data for backplane transmission, as supported by the µPD98441 and µPD98442, contribute to improve communication efficiency and reduce power consumption of communication systems like cellular base station systems, while offering cost reduction and higher reliability. 

“Network system manufacturers are now grappling with the problem of how to respond to demands for lower costs without sacrificing reliability or performance,” said Kats Nagazawa, General Manager of the PC Peripheral Systems Divisions, 2nd System Operations Unit, NEC Electronics Corporation.  “In response to this problem, we developed the new products with functions ideal for backplane communications.  As a solution provider, we plan to continue developing IP cores that will respond to mid- to long-term developments in the wireless infrastructure equipment market and other networking applications, while at the same time supply products that meet customers’ immediate needs.”

Key features of µPD98441 and µPD98442:
(1) The µPD98441 and µPD98442 feature 2 and 8 LVDS link channels, respectively. This reflects the star-type point-to-point topology often used in communication systems where for example data are exchanged between a central switch card and multiple line cards.  The LVDS (Low Voltage Differential Signal) technology is well introduced in power saving high speed communication. In comparison with parallel bus structures it offers high signal integrity due to build-in suppression of distortions and unintentional radiated emissions. High bandwidth makes systems future proof beyond the data transmission capacity of typical parallel busses.
(2) In “normal mode” each physical link with its data transmission rate up to 880 Mbps connects to another eTR physical channel.  eTR2 thus supports 2 communication links and eTR8 supports 8 links.
(3) In “protection mode” for systems with very high requirements to reliability and availableness, with the eTR chips used together, half of the channels can be used as protection links.  With build-in redundancy logic, the chips control one active and one standby channel in a pair of physical links.
(4) Two parallel interface types are supported by the eTR devices:  the UTOPIA interface as defined by the ATM Forum and the industry-standard POS-PHY interface.  The µPD98442 supports level 3 and level 2 UTOPIA and POS-PHY interfaces, and the µPD98441 supports level 2.  So it is possible with these devices to communicate between boards and chips with different level of the parallel interface.
(5) Both eTR devices include a flow control function to inform each other about the internal FIFO status via the serial interface.  This backpressure mechanism avoids FIFO overflow, i.e. the transmission of data which cannot be processed on the other side of a link and finally raises the reliability of the backplane data transmission.
(6) The usage of field proven high-speed SerDes macros inside the eTR devices not only allows for backplane transmission but also for cable connections over several meter distance.  So the different shelves inside a rack or even different racks can be linked by eTR devices.

Applications
The eTR transceiver chips are ideal for cellular infrastructure like base stations, base station controllers, and core network elements.  Other communication systems which today use internal ATM data transfer like DSLAM systems, but also ATM-switches and routers will benefit from the new eTR device family.  Due to supporting the POS-PHY interface, also IP-based networks will use the new devices to their advantage.

Availability
Engineering samples ofµPD98441 and µPD98442 are available now, with mass production scheduled to start in August 2004.  Monthly production volume of the two products total is expected to reach 100,000 units in 2005.

NEC Electronics and NEC Electronics America are either a registered trademark or trademark of NEC Electronics Corporation in the United States and/or other countries.  POS-PHY is a trademark of PMC-Sierra, Inc. All other registered trademarks or trademarks are property of their respective owners.

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