ERTEC 200 Technical Features

The ERTEC 200 is a 2 port switch with integrated PHYs , it is designed to be used in I/O devices and field devices. The device and development kit will be available later in 2006.

Key Highlights:

ARM 946 ES processor

Integrated high-performance ARM 946ES RISC for optimized communications integration and application tasks

Clock rate 50, 100, 150 MHz

• Integrated PLL
• 4-Kbyte D-Cache, 8-Kbyte I-Cache, 4-Kbyte D-TCM
• Debugging capability via embedded ICE (JTAG)
• 8-Kbyte SRAM on chip
• Boot ROM

On Board DMA controller

2 Integrated PHYs

Switching

• Integrated 2-port switch for 10/100-Mbit Ethernet
• Supports Standard communication/ Real-time/ Isochronous Real-time data transfer
• 64-Kbyte SRAM on chip for telegram buffering

Bus interface

• Asynchronous (32-bit) interface
• SDRAM interface for 128-Mbyte external memory
• Chip-select support
• Local Bus-Master interface

Processor periphery

• 1 independent serial ports
• SPI-Master interface
• Timer function
• Watchdog
• External interrupt inputs

Free I/Os

• 45 parametrizable I/Os
• Multifunctional outputs

Other features:

• 304 pin BGA package
• Power supply: 3.3 V and 1.5 V
• Temperature range: -40 ºC to +85 ºC

The ERTEC devices combine isochronous real-time and IT without compromise.

For motion control applications, up to 150 axes can be controlled with a cycle time of 1 ms and a jitter of less than 1 µs while at the same time 50% of the bandwidth is available for IT communication.