Agenda

V85x Family

32-bit Microcomputers

Objective:

Impart detailed knowledge about the V850 CPU architecture, the main peripheral functionalities of the V850ES derivatives, IAR software development environment and flash memory programming. Features and options of hardware and software tools will be explained. Practical sessions are device oriented and executed based on on-chip debug features (N-Wire tool) or IECUBE emulators. The workshop organization offers attendees to choose either the complete workshop or certain days according to their individual requirements.

Schedule:

• V850 Roadmap
• V850 Architecture
  • Register
  • Instruction
  • Pipeline

1st day - Afternoon session

• Intro IAR (ex) Workbench
  • MemoryMap
  • BCU
  • Interrupt (ex)
• NEC Electronics' EMC strategy

• IAR Workbench
  • Compiler (ex)
  • Optimisation
  • Linker

3rd day - Afternoon session

• Flash Programmer
• Flash Features
  • Protection / Security
  • Selfprogramming / EEPROM emulation
  • Exercise

• Device details
• Clock tree
• Peripheral
  • DMA
  • Timer (ex)
  • Serial IO (ex)
  • AD/DA (ex)
  • Ports
  • RESET

2nd day - Afternoon session

• Tools
  • IECUBE / Minicube
  • Starter Kits (ex)
• Debugger
  • Timer (ex)
  • Trace (ex)
  • Breakpoint (ex)